Part Number | 74HC112PW,118 |
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Manufacturer | Nexperia |
Quantity in stock | 815310 Pieces |
Market Price | - |
Our Better Price | Send by email: [email protected] |
Delivery Time | 1 day (can ship today) |
Description | Flip Flop JK-Type Neg-Edge 2-Element 16-Pin TSSOP T R |
Category | Logic & Timing IC |
Family | Logic ICs |
ROHS Compliant | Yes |
MSL Level | 74HC112PW,118 |
Datasheet download | ![]() |
Part Number | 74HC112PW,118 |
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Maximum Propagation Delay Time @ Maximum CL | 175@2V|[email protected]|30@6V ns |
Number of Channels per Chip | 2 |
Logic Family | HC |
Number of Elements per Chip | 2 |
Output Signal Type | Differential |
Set/Reset | Set/Reset |
Maximum High Level Output Current | -7.8 mA |
Polarity | Inverting/Non-Inverting |
Product Dimensions | 5.1 x 4.5 x 0.95 mm |
Logic Function | JK-Type |
Minimum Operating Supply Voltage | 2 V |
Pin Count | 16 |
Supplier Package | TSSOP |
Lead Finish | Gold |
Rad Hard | No |
MSL Level | 1 |
Max Processing Temp | 250|260 |
Maximum Quiescent Current | 0.004 mA |
Triggering Type | Negative-Edge |
Number of Output Enables per Element | 0 |
Number of Element Outputs | 1 |
Number of Element Inputs | 2 |
Typical Operating Supply Voltage | 5 V |
Maximum Low Level Output Current | 7.8 mA |
Maximum Operating Supply Voltage | 6 V |
Fabrication Technology | CMOS |
Input Signal Type | Single-Ended |
Bus Hold | No |
Propagation Delay Test Condition | 50 pF |
Mounting | Surface Mount |
Operating Temperature | -40 to 125 °C |
Package | 16TSSOP |
Replacement Part Number | PART-74HC112PW,118 |
Weight | Contact us |
Country of Origin | - |
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