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| Part Number | 74LV74PW,118 |
|---|---|
| Manufacturer | Nexperia |
| Quantity in stock | 230050 Pieces |
| Market Price | - |
| Our Better Price | Send by email: [email protected] |
| Delivery Time | 1 day (can ship today) |
| Description | Flip Flop D-Type Pos-Edge 2-Element 14-Pin TSSOP T R |
| Category | Logic & Timing IC |
| Family | Logic ICs |
| ROHS Compliant | Yes |
| MSL Level | 74LV74PW,118 |
| Datasheet download |  74LV74PW,118.pdf |
| Part Number | 74LV74PW,118 |
|---|---|
| Propagation Delay Test Condition | 50 pF |
| Logic Family | LV |
| Maximum High Level Output Current | -12 mA |
| Product Dimensions | 5.1 x 4.5 x 0.95 mm |
| Polarity | Inverting/Non-Inverting |
| Minimum Operating Supply Voltage | 1 V |
| Maximum Propagation Delay Time @ Maximum CL | [email protected]|24@2V|[email protected]|[email protected]|9.5@5V ns |
| Logic Function | D-Type |
| Rad Hard | No |
| Pin Count | 14 |
| Maximum Quiescent Current | 0.08 mA |
| Max Processing Temp | 260 |
| Supplier Package | TSSOP |
| Lead Finish | Gold |
| Operating Temperature | -40 to 125 °C |
| Typical Operating Supply Voltage | 3.3 V |
| Mounting | Surface Mount |
| MSL Level | 1 |
| Maximum Low Level Output Current | 12 mA |
| Input Signal Type | Single-Ended |
| Fabrication Technology | CMOS |
| Bus Hold | No |
| Maximum Operating Supply Voltage | 5.5 V |
| Number of Channels per Chip | 2 |
| Triggering Type | Positive-Edge |
| Number of Element Inputs | 1 |
| Number of Output Enables per Element | 0 |
| Number of Element Outputs | 1 |
| Number of Elements per Chip | 2 |
| Output Signal Type | Differential |
| Set/Reset | Set/Reset |
| Package | 14TSSOP |
| Replacement Part Number | PART-74LV74PW,118 |
| Weight | Contact us |
| Country of Origin | - |
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