| Part Number | SN74HC112DR |
|---|---|
| Manufacturer | Texas Instruments |
| Quantity in stock | 458730 Pieces |
| Market Price | - |
| Our Better Price | Send by email: [email protected] |
| Delivery Time | 1 day (can ship today) |
| Description | Flip Flop JK-Type Neg-Edge 2-Element 16-Pin SOIC T R |
| Category | Logic & Timing IC |
| Family | Logic ICs |
| ROHS Compliant | Yes |
| MSL Level | SN74HC112DR |
| Datasheet download |
| Part Number | SN74HC112DR |
|---|---|
| Triggering Type | Negative-Edge |
| Maximum Quiescent Current | 0.004 mA |
| Number of Element Outputs | 1 |
| Number of Output Enables per Element | 0 |
| Number of Element Inputs | 2 |
| Typical Operating Supply Voltage | 5 V |
| Logic Family | HC |
| Number of Elements per Chip | 2 |
| Set/Reset | Set/Reset |
| Output Signal Type | Differential |
| Product Dimensions | 10 x 4 x 1.5 mm |
| Polarity | Inverting/Non-Inverting |
| Logic Function | JK-Type |
| Minimum Operating Supply Voltage | 2 V |
| Maximum Propagation Delay Time @ Maximum CL | 125@2V|[email protected]|21@6V ns |
| Supplier Package | SOIC |
| Pin Count | 16 |
| Maximum Low Level Output Current | 5.2 mA |
| Maximum Operating Supply Voltage | 6 V |
| Fabrication Technology | CMOS |
| Bus Hold | No |
| Input Signal Type | Single-Ended |
| Propagation Delay Test Condition | 50 pF |
| Screening Level | Commercial |
| Mounting | Surface Mount |
| Lead Finish | Gold |
| Number of Channels per Chip | 2 |
| Rad Hard | No |
| Operating Temperature | -40 to 85 °C |
| Max Processing Temp | 260 |
| MSL Level | 1 |
| Maximum High Level Output Current | -5.2 mA |
| Package | 16SOIC |
| Replacement Part Number | PART-SN74HC112DR |
| Weight | Contact us |
| Country of Origin | - |
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