| Part Number | 74LVT573PW,118 |
|---|---|
| Manufacturer | Nexperia |
| Quantity in stock | 189130 Pieces |
| Market Price | - |
| Our Better Price | Send by email: [email protected] |
| Delivery Time | 1 day (can ship today) |
| Description | Latch Transparent 3-ST 8-CH D-Type 20-Pin TSSOP T R |
| Category | Logic & Timing IC |
| Family | Logic ICs |
| ROHS Compliant | Yes |
| MSL Level | 74LVT573PW,118 |
| Datasheet download |
| Part Number | 74LVT573PW,118 |
|---|---|
| Lead Finish | Gold |
| Number of Input Enables per Element | 1 |
| Maximum Operating Supply Voltage | 3.6 V |
| Maximum Low Level Output Current | 64 mA |
| Minimum Operating Supply Voltage | 2.7 V |
| Set/Reset | No |
| Typical Operating Supply Voltage | 3.3 V |
| Typical Quiescent Current | 3000 uA |
| Maximum Quiescent Current | 12000 uA |
| Number of Elements per Chip | 1 |
| Fabrication Technology | BiCMOS |
| Number of Outputs per Chip | 8 |
| Maximum High Level Output Current | -32 mA |
| Bus Hold | Yes |
| Type | D-Type |
| Pin Count | 20 |
| Output Type | 3-State |
| Number of Selection Inputs per Element | 0 |
| Rad Hard | No |
| Number of Output Enables per Element | 1 |
| Maximum Propagation Delay Time @ Maximum CL | [email protected] ns |
| Max Processing Temp | 260 |
| Polarity | Non-Inverting |
| Propagation Delay Test Condition | 50 pF |
| MSL Level | 1 |
| Logic Family | LVT |
| Operating Temperature | -40 to 85 °C |
| Supplier Package | TSSOP |
| Product Dimensions | 6.6 x 4.5 x 0.95 mm |
| Number of Channels per Chip | 8 |
| Latch Mode | Transparent |
| Number of Inputs per Chip | 8 |
| Mounting | Surface Mount |
| Package | 20TSSOP |
| Replacement Part Number | PART-74LVT573PW,118 |
| Weight | Contact us |
| Country of Origin | - |
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